proteanTecs Unveils Advanced Packaging Solutions to Improve Yield, Performance, and Reliability of Multi-Die Systems

proteanTecs®, the leading provider of deep data visibility for advanced electronics, today unveiled a dedicated suite of health, power and performance management solutions for multi-die systems. Based on the company’s unique on-chip monitoring technology, semiconductor and system companies can now improve yield, reduce risk and protect investments in high-value systems-in-package.

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Integrates per-chiplet visibility from pre-assembly screening through SiP production and in-mission operation, helping customers reduce costly packaging failures and optimize multi-die system power/performance

Integrates per-chiplet visibility from pre-assembly screening through SiP production and in-mission operation, helping customers reduce costly packaging failures and optimize multi-die system power/performance

AI is fundamentally changing the architecture of advanced compute. As processors, accelerators, memory and connectivity are brought together through increasingly sophisticated multi-die packages, managing each component in isolation is no longer enough.

Building on its proven deep data analytics and real-time power, performance and reliability solutions, proteanTecs is extending its offering with advanced capabilities purpose-built for chiplet-based architectures and multi-die systems. The solutions combine shift-left chiplet quality assurance, pre-to-post packaging correlation, synchronized inter-chiplet analysis and multi-stream data analytics. This provides per-chiplet visibility and reveals integration-induced effects such as thermal gradients, power and clock noise, structural stress and workload-dependent behavior. These capabilities extend into in-mission operation, providing thermal, power and timing-margin awareness for real-time optimization of power/performance and reliability in the field.

As the System-in-Package (SiP) increasingly becomes a system in its own right, proteanTecs enables customers to move beyond monitoring individual components and understand how chiplets behave and interact as part of the complete package.

With advanced packaging, the cost of discovering a marginal die increases dramatically once that die has been integrated with other high-value components. The ability to identify risk earlier by providing DPPM reduction beyond the best-known-methods at Wafer Sort, understand what changed at package assembly, and make better decisions at every stage can have a significant impact on compound yield, quality and the economics of the final system.

This helps customers:

  • Increase confidence in known-good-die (KGD) and known-good-stack (KGS) quality

  • Improve compound yield across multi-die architectures

  • Improve visibility into package and power delivery quality

  • Reduce development risk and accelerate time-to-market

  • Optimize power and performance across constrained multi-die systems

  • Improve long-term reliability and lifecycle performance

“Advanced packaging introduces subtle electrical, thermal and mechanical interactions that conventional pass-or-fail testing simply cannot reveal,” said Evelyn Landman, Co-founder and CTO of proteanTecs. “Deep, per-chiplet visibility enables customers to understand not only whether a complex SiP works, but how each die is behaving and how the dies are interacting – from initial production through years of operation in the field.”

proteanTecs is already scaling these advanced packaging capabilities through multi-year, multi-generation engagements with leading customers, building on years of experience delivering deep data analytics and real-time reliability, power, and performance optimization across silicon and systems.

To learn more about the challenges and opportunities of advanced packaging, proteanTecs will host a webinar with Amkor Technology, “Advanced Packaging at Scale: Power, Performance, and Reliability in the Chiplet Era,” on August 26, 2026, at 10:00 a.m. PDT. Nir Sever, Senior Director of Business Development at proteanTecs, and Vineet Pancholi, Senior Director and Manufacturing Test Technologist at Amkor, will discuss approaches for addressing power, performance and reliability as chiplet-based designs move toward production at scale. To register, visit: Advanced Packaging at Scale: Power, Performance, and Reliability in the Chiplet Era.

About proteanTecs

proteanTecs is the leading provider of Lifecycle Health and Performance Management solutions for advanced electronics. Trusted by global leaders across the AI, data center, automotive, telecommunications, and mobile markets, proteanTecs provides deep visibility, predictive insights, and in-mission actuation, from production to in-field operation. Powered by a Hardware Monitoring System with embedded on-chip monitors, the company’s solutions generate real-time data that enables in-silicon action, advanced analytics, and telemetry-based software applications—driving new levels of quality, power efficiency, performance, and reliability.

Founded in 2017 and backed by leading global investors, the company is headquartered in Israel and has offices in the United States, India, Taiwan, South Korea, and Japan. For more information, visit www.proteanTecs.com.

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